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ltc4067 1 4067f usb power manager with ovp and li-ion/polymer charger the ltc ? 4067 is a usb power management and li-ion/ polymer battery charger designed for portable battery powered applications. the part controls total current used by the usb peripheral for operation and battery charging. the total input current may be left unregulated, or it may be limited to 20% or 100% of the programmed value up to 1.5a (typically 500ma). battery charge current is au- tomatically reduced such that the sum of the load current and the charge current does not exceed the programmed input current. with the addition of an external p-channel mosfet the ltc4067 can withstand voltages up to 13v. the ltc4067 includes a complete constant current/con- stant voltage linear charger for single cell li-ion batteries. the ? oat voltage applied to the battery is held to a tight 0.4% tolerance, and charge current is programmed using an external resistor to ground. an end-of-charge status output, ? c ? h ? r ? g, indicates full charge. also featured is an ntc thermistor input used to monitor battery temperature while charging. the ltc4067 is available in a 12-lead low pro? le 4mm 3mm dfn package. programmable input current limit: single resistor at clprog pin to set and monitor input current battery charger/ideal diode/controller: 13v overvoltage protection full featured battery charger with 4.2v float up to 1.25a programmable charge current thermal regulation maximizes charge current without risk of overheating internal 2 hour termination timer from onset of voltage mode charging automatic load switchover to battery power with internal ideal diode and drive output for optional external mosfet ntc thermistor input bad battery time-out detection 4mm 3mm 12-lead dfn package features descriptio u typical applicatio u , ltc and lt are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. automatic battery charging/load switchover backup battery charger uninterrupted supplies applicatio s u 2k 10 f ltc4067 ovi out ovp 1-cell li-ion i load 2k in bat i lim0 prog i lim1 clprog gnd wall or usb 10 f 10nf 1 f 4067 ta01 chrg i lim0 i lim1 i in(max) l l h h h l h l o (suspend) 200v/r clprog 1000v/r clprog fixed (2a) 4067 ta01b 1ms/div v ovp 5v/div v out 5v/div i in 500ma/div v ovi 5v/div 5v to 12v v bat = 4.2v ovp response to ramp input at ovi
ltc4067 2 4067f in, out, bat voltage (t < 1ms, duty cycle < 1%) ...................... ?0.3v to 7v steady state, in, out, bat voltage .............. ?0.3v to 6v ntc, i lim0 , i lim1 , prog, clprog, } c } h } r } g, gate voltages (note 6) ....................................?0.3v to v cc ovi, ovp voltages ..................................... ?0.3v to 13v operating temperature range ................. ?40c to 85c storage temperature range ................... ?65c to 125c max junction temperature (t jmax ) ..................... 125c (note 1) the o denotes the speci? cations which apply over the full operating temperature range (note 3), otherwise speci? cations are at t a = 25c. note 2 unless otherwise noted, v in = 5v, v bat = 3.7v, v ilim0 = 0v, v ilim1 = 0v, r prog = 2k, r clprog = 2k, v ovi = 0v, v ntc = v in /2. electrical characteristics absolute axi u rati gs w ww u symbol parameter conditions min typ max units v in in supply voltage o 5.5 v i in input supply current v ntc = 5v (forces i bat = i prog = 0) suspend: v ilim0 = 0v, v ilim1 = 5v, no load shutdown: v prog = 5v o o o 0.4 52 12 1.2 90 30 ma a a i bat battery supply current v bat = 4.3v, charging stopped suspend: v ilim0 = 0v v ilim1 = 5v, no load, v in = 5.5v shutdown: v prog = 5v ideal diode: v in = float, bat powers out, no load o o o o 14 6 2.5 60 30 12 5 100 a a a a i in(max) maximum input current limit v out = 4v, i lim0 = 5v i lim1 = 0v (note 7) 1.5 2 a package/order information 12 11 10 9 8 7 13 1 2 3 4 5 6 in out bat gate prog ovp clprog chrg ntc i lim0 i lim1 ovi top view de package 12-lead (4mm 3mm) plastic dfn t jmax = 125c, e ja = 43c/w exposed pad (pin 13) is gnd, must be soldered to pcb order part number de part marking ltc4067ede 4067 order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges.
ltc4067 3 4067f the denotes the speci? cations which apply over the full operating temperature range (note 3), otherwise speci? cations are at t a = 25c. note 2 unless otherwise noted, v in = 5v, v bat = 3.7v, v ilim0 = 0v, v ilim1 = 0v, r prog = 2k, r clprog = 2k, v ovi = 0v, v ntc = v in /2. electrical characteristics symbol parameter conditions min typ max units v iuvlo in undervoltage lockout rising threshold falling threshold 3.5 3.8 3.675 4v v v buvlo bat undervoltage lockout rising threshold falling threshold 2.5 2.8 2.7 3v current limit r fwd,in on-resistance of input power fet i out = 200ma 220 m i lim input current limit hpwr mode: v ilim0 = v ilim1 = 5v lpwr mode 475 90 500 98 525 110 ma ma v clprog clprog pin servo voltage hpwr mode: v ilim0 = v ilim1 = v cc , v out = 4v lpwr mode : v out = 4v 0.95 0.18 1 0.2 1.05 0.22 v v i ss soft start inrush current r clprog = 4k, short at out (note 8) 0.3 ma/s battery charger v float regulated output voltage i bat = C2ma (0c C 85c); i bat = C2ma 4.185 4.167 4.2 4.2 4.215 4.234 v v i cc-chg constant-current mode charge current r prog = 2k, no load at out r prog = 1k, no load at out, r clprog = 1k 470 940 500 1000 530 1060 ma ma i chg(max) maximum charge current r prog = r clprog = 0 (note 7) 2 a v prog prog pin servo voltage r prog = 2k; i bat = C500ma r prog = 1k; i bat = C1a r prog = 2k, v bat < v trikl , i bat = i trikl 980 980 90 1000 1000 100 1020 1020 110 mv mv mv i eoc end-of-charge bat current v bat = 4.2v; as a ratio to full bat charge current (i cc-chg ) 0.08 0.093 0.106 ma/ma i trikl trickle charge current v bat = 2v 35 50 60 ma v rechrg recharge battery threshold voltage v float C v rechrg 65 100 135 mv t timer timer period 1.7 2 2.3 hrs low battery trickle charge time percent of total charge time, v bat < 2.8v 25 % t lim junction temperature in constant temperature mode (note 4) 105 c ideal diode r fwd on-resistance, v on regulation v ilim0 = 0v, v ilim1 = 5v, v bat = 4.3v, i out = C200ma, measured as v/ i 200 m r dio,on on-resistance v bat to v out v ilim0 = 0v, v ilim1 = 5v, v bat = 4.3v, i out = C1a 220 m v fwd voltage forward drop (v bat C v out )v ilim0 = 0v, v ilim1 = 5v, v bat = 4.3v, i out = C1ma v ilim0 = 0v, v ilim1 = 5v, v bat = 4.3v, i out = C200ma v ilim0 = 0v, v ilim1 = 5v, v bat = 4.3v, i out = C1a 10 25 70 240 40 mv mv mv i d(max) ideal diode current limit v ilim0 = 0v, v ilim1 = 5v, v bat = 4.3v (notes 4, 5) 1.5 2.1 a i gpu gate pin output pull up current v out > v bat , v gate = 0v 1.9 ma i gpd gate pin output pull down current v ilim0 = 0v, v ilim1 = 5v, v bat = 4.3v, i out = 1a, v gate = 4.3v 1.9 ma
ltc4067 4 4067f the denotes the speci? cations which apply over the full operating temperature range (note 3), otherwise speci? cations are at t a = 25c. note 2 unless otherwise noted, v in = 5v, v bat = 3.7v, v ilim0 = 0v, v ilim1 = 0v, r prog = 2k, r clprog = 2k, v ovi = 0v, v ntc = v in /2. electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: current into a pin is positive and current out of a pin is negative. all voltages referenced to gnd note 3: the ltc4067 is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c ambient operating temperature range are assured by design, characterization and correlation with statistical process controls. note 4: speci? cation is guaranteed by design and not 100% tested in production. symbol parameter conditions min typ max units ntc i ntc ntc input leakage current v ntc = 2.5v 0 1 a v cold cold temperature fault threshold voltage rising threshold hysteresis 0.725 ? v in 0.733 ? v in 0.02 ? v in 0.741 ? v in v v v hot hot temperature fault threshold voltage falling threshold hysteresis 0.287 ? v in 0.29 ? v in 0.02 ? v in 0.293 ? v in v v v dis ntc disable voltage ntc input voltage to gnd (falling) hysteresis 80 100 30 120 mv mv logic f mod serrated fault pulse modulation frequency at ? c ? h ? r ? g pin (v dis < v ntc < v hot ) or (v ntc > v cold ) v bat < 2.9v for longer than trickle charge time 1.5 6 hz hz f pw serrated fault pulse width at ? c ? h ? r ? g pin (v dis < v ntc < v hot ) or (v ntc > v cold ) v bat < 2.9v for longer than trickle charge time 1.33 2.62 s s f tf serrated fault pulse frequency at ? c ? h ? r ? g pin (v dis < v ntc < v hot ) or (v ntc > v cold ) or v bat < 2.9v for longer than trickle charge time 35 khz v ol output low voltage ( ? c ? h ? r ? g) i sink = 5ma 1.5 v v ih enable input high voltage ilim0, ilim1 pin low to high 1.2 v v ll enable input low voltage ilim0, ilim1 pin high to low 0.4 v i pulldn logic input pull down current ilim0, ilim1 2 a v ovth overvoltage protection threshold (ovi pin) v ovi rising threshold hysteresis 5.8 6 250 6.2 v mv v prog,sd shutdown threshold v cc C v prog rising (note 6) hysteresis 1.4 50 v mv i prog,pullup prog pin shutdown sense current v prog = 1v 3.5 a note 5: this ic includes over-temperature protection that is intended to protect the device during momentary overload conditions. junction temperature exceeds 125c when over-temperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may result in device degradation or failure. note 6: v cc is the greater of v in , v out or v bat . note 7: accuracy of programmed current may degrade for currents greater than 1a. note 8: clprog soft-start scales with inverse of clprog resistor. if r clprog = 2k, then i ss = 0.6ma/s.
ltc4067 5 4067f temperature ( c) C50 i q(batsd) ( a) 150 4067 g09 C10 30 90 130 70 110 C30 10 50 12 10 8 6 4 2 0 temperature ( c) r on (m ) 4067 g08 240 220 200 180 160 140 120 100 v in = 4.45v r clprog = 0k hpwr r on , 1a r on , 500ma r on , 200ma r on , 100ma C50 125 0 75 100 C25 25 50 temperature ( c) C50 i lim (ma) 150 4067 g05 0 50 100 125 C25 25 75 510 505 500 495 490 485 480 v clprog (mv) 1010 1000 990 980 v clprog i lim input current limit vs temperature (high power) i q(bat) ( a) 4067 g04 90 80 70 60 50 40 30 20 10 0 temperature ( c) C50 150 C10 30 90 130 70 110 C30 10 50 in = out = float v bat = 3.7v i lim (ma) 4067 g06 i lim v clprog temperature ( c) C50 125 0 75 100 C25 25 50 102 100 98 96 94 92 90 v clprog (mv) 204 200 196 192 188 184 180 temperature ( c) C50 i q(sd) ( a) 150 4067 g01 C10 30 90 130 70 110 C30 10 50 16 14 12 10 8 6 4 2 0 4067 g02 90 80 70 60 50 40 30 20 10 0 temperature ( c) C50 i q(susp) ( a) 150 C10 30 90 130 70 110 C30 10 50 i q ( a) 4067 g03 450 350 400 300 250 200 150 100 50 0 temperature ( c) C50 150 C10 30 90 130 70 110 C30 10 50 charger enters thermal regulation input supply current vs temperature (shutdown mode) input supply current vs temperature (suspend mode) input supply current vs temperature battery current vs temperature battery current vs temperature (shutdown) input current limit vs temperature (low power) v clprog vs temperature at i in = 500ma r on vs temperature typical perfor a ce characteristics uw temperature ( c) C50 150 C10 30 90 130 70 110 C30 10 50 v clprog (mv) 4067 g07 1000 800 600 400 200 0 v out = 4v r clprog = 2k i out = 200ma hpwr lpwr
ltc4067 6 4067f temperature ( c) C50 v prog (v) 125 4067 g11 0 50 100 C25 25 75 1.2 1.0 0.8 0.6 0.4 0.2 0 onset of thermal regulation i out (ma) 0 v fwd (mv) 2000 4067 g18 400 800 1200 1600 500 400 300 200 100 0 v in = 5v v bat = 3.6v susp t a = 130 c t a = 90 c t a = 50 c t a = 10 c t a = C30 c v bat (v) 0 i bat (ma) 4.5 4067 g13 3.5 3.0 2.5 2.0 1.5 0.5 1.0 4.0 600 500 400 300 200 100 0 v in = 5v i out = 0ma r prog = 2k r prog = 4k v bat (v) 3.4 i cc-chg (ma) 4.2 4067 g14 3.9 3.8 3.7 3.5 3.6 4.1 4.0 525 500 450 475 425 v in = 5v i out = 0ma 2k v float (v) 4067 g10 4.30 4.25 4.20 4.15 4.10 temperature ( c) C50 110 C10 30 90 70 C30 10 50 v in (v) 3.0 v float (v) 6.0 4067 g12 5.5 5.0 4.5 4.0 3.5 4.4 4.2 4.0 3.8 3.6 3.4 3.2 3.0 temperature ( c) C50 50 i bat (ma) 110 4067 g17 C10 10 80 C30 30 70 90 600 500 400 300 200 100 0 v in = 5v v bat = 3.6v onset of thermal regulation battery float voltage vs temperature charge current vs battery voltage charge current vs temperature (thermal regulation) ideal diode forward voltage vs current and temperature typical perfor a ce characteristics uw charge current vs battery voltage battery regulated (float) voltage vs input voltage v prog vs temperature at i bat = C500ma
ltc4067 7 4067f i bat (ma) 0 v prog (mv) 500 4067 g21 250 450 400 300 350 200 150 100 50 1200 1000 200 400 600 800 0 v in = 5v i out = 0ma r prog = 2k r prog = 4k i out (ma) 0 v fwd (mv) 2000 4067 g19 400 800 1200 1600 500 400 300 200 100 0 r fwd (m ) 500 400 300 200 100 0 v in = 5v v bat = 3.6v susp v fwd at t a = 130 c v fwd at t a = 50 c v fwd at t a = C50 c r fwd at t a = 130 c r fwd at t a = 50 c r fwd at t a = C50 c i in (ma) 0 v clprog (mv) 600 500 4067 g22 400 300 200 100 1200 1000 200 400 600 800 0 v bat = 3.8v r clprog = 2k r clprog = 4k i out (ma) 0 i in or i bat (ma) 1000 4067 g23 500 400 300 200 100 600 700 800 900 600 500 400 300 200 100 C400 C300 C200 C100 0 C500 v bat = 3.8v r clprog = 2k r prog = 2k hpwr i in i bat charging i bat ideal diode ideal diode and schottky diode forward voltage vs current v prog vs i bat v clprog vs i in i in or i bat and i out hpwr mode typical perfor a ce characteristics uw ideal diode forward voltage and resistance vs current v fwd (mv) 0 i out (ma) 450 4067 g13 350 300 250 200 150 50 100 400 2000 1000 800 600 400 200 1800 1600 1400 1200 0 v bat = 3.6v ltc4067 1n5817
ltc4067 8 4067f 20 s/div 4067 g32 2v/div i chrg (ma) 0 v ol (v) 10 4067 g33 5 4 3 2 16789 5.0 4.0 3.0 2.0 1.0 0 4.5 3.5 2.5 1.5 0.5 i out (ma) 0 v in C v out (mv) 600 500 4067 g28 400 300 200 100 400 300 200 100 350 250 150 50 0 v in = ntc = 4.4v clprog = 2k i lim0 = 4.4v i lim1 = 4.4v 20 s/div 4067 g31 2v/div typical perfor a ce characteristics uw ? c ? h ? r ? g pin serrated pulse for ntc faults (v in C v out ) vs i out ? c ? h ? r ? g pin serrated pulse for bad bat faults ? c ? h ? r ? g v ol vs i ? c ? h ? r ? g
ltc4067 9 4067f clprog (pin 1): current limit program pin. connect- ing a 1% resistor, r clprog , to ground programs input current limit depending on the selected operating mode. operating mode and input current limit are programmed depending on the i lim0 and i lim1 pin voltages according to the following table: table 1. i lim programming i lim0 i lim1 i limit (a) mode l h 0 suspend l l 200v/r clprog low power h h 1000v/r clprog high power hl 2 cldis the maximum clprog resistance value should be no more than 5k. ground to disable the current limit function. ? c ? h ? r ? g (pin 2): open drain charge/fault status output. when the battery is being charged, the ? c ? h ? r ? g pin is pulled low by an internal n-channel mosfet. when the timer runs out or the charge current drops below a programmable level or the supply is removed, the ? c ? h ? r ? g pin is forced into a high impedance state. float or tie to ground when not in use. ntc (pin 3): thermistor sense input to the thermistor moni- toring circuits. under normal operation, tie a thermistor from the ntc pin to ground and a resistor of equal value from the ntc pin to in. connect the ntc pin to ground to disable this feature. i lim0 (pin 4): current limit control input. float or connect to ground when not in use (see table 1). i lim1 (pin 5): current limit control input. float or connect to ground when not in use (see table 1). ovi (pin 6): overvoltage protection sense input. connect to ground when not in use. bypass to ovp with a 10nf capacitor. ovp (pin 7): overvoltage protection output. drive output for an external high-voltage protection pfet. float when not in use. prog (pin 8): charge current program pin. connecting a 1% resistor, r prog , to ground programs the charge current during the constant-current portion of the charge cycle according to the following formula: i cc-chg (a) = 1000v/r prog if the prog pin is pulled above the v sd threshold or left ? oating, the ltc4067 enters low power shutdown mode to conserve power, in this way an open-drain driver in series with the prog resistor serves as an enable control. grounding this pin disables charge current limit and turns off ? c ? h ? r ? g status signal. gate (pin 9): external ideal diode gate connection. this pin controls the gate of an optional external p-channel mosfet transistor used to supplement the internal ideal diode. the source of the p-channel mosfet should be connected to out and the drain should be connected to bat. it is important to maintain high impedance on this pin and minimize all leakage paths. bat (pin 10): single-cell li-ion battery. depending on available power and load, a li-ion battery on bat will either deliver system power to out through the ideal diode or be charged from the battery charger. out (pin 11): output voltage of the powerpath? controller and input voltage of the battery charger. the majority of the portable product should be powered from out. the ltc4067 will partition the available power between the external load on out and the internal battery charger. priority is given to the external load and any extra power is used to charge the battery. an ideal diode from bat to out ensures that out is powered even if the load exceeds the allotted input current from in or if the in power source is removed. out should be bypassed with a low impedance multilayer ceramic capacitor of at least 10f. in (pin 12): usb input voltage. in will usually be connected to the usb port of a computer or a dc output wall adapter. in should be bypassed with a low impedance multilayer ceramic capacitor of at least 1f. exposed pad (pin 13): ground. the exposed pad is ground and must be soldered to the pc board for proper functionality and for maximum heat transfer. pi fu ctio s uuu powerpath is a trademark of linear technology corporation.
ltc4067 10 4067f gnd ntc ovp ovi 6v 1v 0.2v 0v hpwr cldis lpwr susp sd cold fault hot fault sd ovp i lim1 i lim0 programmable current limit ideal v servo in 4067 bd out clprog gate bat chrg prog r prog C + r clprog 0.1v in + C 100mv + C C + C + decode logic mux ntc off 0.29v in + C hot fault 0.74v in + C cold fault i bat /1000 sdb sd float current limit out in v cc bat v max cc/cv charger cold fault hot fault charge status/ fault flag 25mv i out /1000 + C block diagra w figure 1. simpli? ed block diagram
ltc4067 11 4067f operatio u introduction the ltc4067 is a complete powerpath controller for bat- tery powered usb applications. the ltc4067 is designed to receive power from a usb source (or a wall adapter) or a battery. it can then deliver power to an application connected to the out pin and a battery connected to the bat pin (assuming that an external supply other than the battery is present). power supplies that have limited cur- rent resources (such as usb v bus supplies) should be connected to the in pin which has a programmable current limit. battery charge current will be adjusted to ensure that the sum of the charge current and the load current does not exceed the programmed input current limit. an internal ideal diode function provides power from the battery when output/load current exceeds the input cur- rent limit or when the input power is removed. powering the load through the ideal diode instead of connecting the load directly to the battery allows a fully charged battery to remain fully charged until external power is removed. once external power is removed the output drops until the ideal diode is forward biased. the forward biased ideal diode will then provide the output power to the load from the battery. furthermore, powering switching regulator loads from the out pin (rather than directly from the battery) results in shorter battery charge times. this is due to the fact that switching regulators typically require constant input power. when this power is drawn from the out pin voltage (rather than the lower bat pin voltage) the current consumed by the switching regulator is lower leaving more current available to charge the battery. finally, the ltc4067 provides overvoltage controller circuitry which, when used in conjunction with an external p-channel mosfet, will protect against overvoltage damage if a wall adapter with greater than 6v output is used. the circuit will tolerate input voltages up to 13v without damage. usb powerpath controller the input current limit and charge control circuits of the ltc4067 are designed to limit input current as well as control battery charge current as a function of i out . out drives the combination of the external load and the bat- tery charger. if the combined load does not exceed the programmed input current limit, out will be connected to in through an internal 200m p-channel mosfet. if the combined load at out exceeds the programmed input current limit, the battery charger will reduce its charge current by the amount necessary to enable the external load to be satis? ed while maintaining the programmed input current. even if the battery charge current is set to exceed the allowable usb current, the usb speci? cation will not be violated. the input current limit will ensure that the usb speci? cation is never violated. furthermore, load current at out will always be prioritized and only excess available current will be used to charge the battery. the current out of the clprog pin is a fraction (1/1000th) of the in current. when a programming resistor is con- nected from clprog to gnd, the voltage on clprog represents the input current: i v r in clprog clprog = ? 1000 the input current limit is programmed by the i lim0 and i lim1 pins (see table 1 in pin functions). the ltc4067 can be con? gured to limit input current to one of several possible settings as well as be deactivated (usb suspend). the input current limit will be set by the appropriate servo voltage and the resistor on clprog according to the fol- lowing expressions: i lim (a) = 0 (suspend) i v r low power lim clprog = 200 () i v r high power lim clprog = 1000 () i lim (a) = 2a (cldis) under worst-case conditions, the usb speci? cation will not be violated with an r clprog of greater than 2.1k. current limit disable (cldis) when i lim1 is low and i lim0 is high, the input current limit is set to a higher current limit for increased charging and
ltc4067 12 4067f operatio u current availability at out. this mode is typically used when there is power available from a wall adapter. suspend mode when i lim1 is high and i lim0 is low, the ltc4067 enters suspend mode to comply with the usb speci? cation. in this mode, the power path between in and out is put in a high impedance state to reduce the in input current to 50a. if no other power source is available to drive out, the system load connected to out is supplied through the ideal diode connected to bat. ideal diode from bat to out the ltc4067 has an internal ideal diode as well as a controller for an optional external ideal diode. both the internal and external ideal diodes will respond quickly whenever out drops below bat. if the load increases beyond the input current limit, ad- ditional current will be pulled from the battery via the ideal diodes. furthermore, if power to in (usb) is removed, then all of the applications power will be provided by the battery via the ideal diodes. the ideal diodes are fast enough to keep out from dropping with just the recommended output capacitor. the ideal diode consists of a precision ampli? er that enables an on-chip p-channel mosfet whenever the voltage at out is approximately 30mv (v fwd ) below the voltage at bat. the resistance of the internal ideal diode is approximately 200m . if this is suf? cient for the applica- tion, then no external components are necessary. however, if more conductance is needed, an external p-channel mosfet can be added from bat to out. the gate pin of the ltc4067 drives the gate of the external p-channel mosfet for automatic ideal diode control. the source of the mosfet should be connected to out and the drain should be connected to bat. capable of driving a 1nf load, the gate pin can control an external p-channel mosfet having extremely low on-resistance. if the bat voltage is below the v buvlo threshold the ideal diodes are disabled. in undervoltage lockout (uvlo) an internal undervoltage lockout circuit monitors in and keeps the input current limit circuitry off until in rises above the rising uvlo threshold (3.8v) and at least 50mv above out. hysteresis on the uvlo turns off the input current limit if in drops below 3.675v or 50mv below out. when this happens, system power at out will be drawn from the battery via the ideal diode. to minimize the possibility of oscillation in and out of uvlo when using resistive input supplies, the input current limit is reduced when in falls to within a few hundred millivolts of the uvlo threshold. to ensure that the full input current limit is available and a complete battery charge cycle can be achieved, apply at least 4.25v to in. battery charger the ltc4067 includes a constant-current/constant-volt- age battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out of temperature charge pausing. when a battery charge cycle begins, the battery charger ? rst determines if the battery is deeply discharged. if the battery voltage is below 2.8v, an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. if the low voltage persists for more than 1/2 hour, the battery charger automatically terminates and indicates via the ? c ? h ? r ? g pin that the battery was unresponsive. once the battery voltage is above 2.8v, the battery charger begins charging in full power constant-current mode. the current delivered to the battery will try to reach 1000v/ r prog . depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. the external load will always be prioritized over the battery charge cur- rent. the usb current limit programming will always be observed and only additional current will be available to charge the battery. when system loads are light, battery charge current will be maximized. charge termination the battery charger has a built-in safety timer. when the battery voltage approaches the 4.2v required to maintain a full charge, otherwise known as the ? oat voltage, the
ltc4067 13 4067f operatio u charge current begins to decrease as the ltc4067 enters constant-voltage mode. once the battery charger detects that it has entered constant-voltage mode, the two hour safety timer is started. after the safety timer expires, charging of the battery will discontinue and no more cur- rent will be delivered. automatic recharge after the battery charger terminates, it will remain off drawing only microamperes of current from the battery. if the portable product remains in this state long enough, the battery will eventually self discharge. to ensure that the battery is always topped off, a charge cycle will automati- cally begin when the battery voltage falls below v rechrg (typically 4.1v). in the event that the safety timer is run- ning when the battery voltage falls below v rechrg , the timer will reset back to zero. to prevent brief excursions below v rechrg from resetting the safety timer, the battery voltage must be below v rechrg for more than 1.3ms. the charge cycle and safety timer will also restart if the in uvlo cycles low and then high (e.g. in is removed and then replaced). charge current the charge current is programmed using a single resistor from prog to ground. 1/1000th of the battery charge cur- rent is delivered to prog which will attempt to servo to 1.000v. thus, the battery charge current will try to reach 1000 times the current in the prog pin. the program resistor and the charge current are calculated using the following equations: r v i i v r prog cc chg cc chg prog == ? ? 1000 1000 , in either the constant-current or constant-voltage charging modes, the prog pin voltage will be proportional to the actual charge current delivered to the battery. therefore, the actual charge current can be determined at any time by monitoring the prog pin voltage and using the fol- lowing equation: i v r bat prog prog = ? 1000 in many cases, the actual battery charge current, i bat , will be lower than i cc-chg due to limited input current available and prioritization with the system load drawn from out. thermal regulation to prevent thermal damage to the ic or surrounding components, an internal thermal feedback loop will automatically decrease the programmed charge current if the die temperature rises to approximately 105c. thermal regulation protects the ltc4067 from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the ltc4067 or external components. the bene? t of the ltc4067 thermal regula- tion loop is that charge current can be set according to actual conditions rather than worst-case conditions with the assurance that the battery charger will automatically reduce the current in worst-case conditions. low power shutdown the ltc4067 enters a low power shutdown mode if the prog pin is pulled above the shutdown threshold, v sd . in shutdown, the bat pin current is reduced to 5a, the in pin current is reduced to 10a, the internal battery charge timer and end-of-charge comparator output are both reset. all power paths are put in a high impedance state. a weak (2.5a) pull up at the prog pin causes the ltc4067 to enter low power shutdown if the prog pin is ? oated. an external n-channel mosfet transistor with its drain tied in series with the prog pin, or an open drain driver may thereby serve as an enable input for the ltc4067. ntc under normal operation, tie a thermistor from the ntc pin to gnd and a resistor of equal value from ntc to in. when the voltage on this pin is above 0.74 ? v in (cold, 0c) or below 0.29 ? v in (hot, 50c) the charge timer is suspended, but not cleared, the charging is disabled and the ? c ? h ? r ? g pin ? ashes from hi-z to active pull-down with a serrated pulse. when the voltage on ntc comes back to between 0.29 ? v in and 0.74 ? v in , the charger timer continues from where it left off, the charging is re-enabled
ltc4067 14 4067f operatio u if the battery is below the recharge threshold. there is approximately 3c of temperature hysteresis associated with each of the input comparators. if the ntc pin is tied to gnd, thermistor quali? ed charging is disabled. fault conditions the ? c ? h ? r ? g pin provides information as to the charging status, indicating an active charge cycle with a strong open-drain pull down at the ? c ? h ? r ? g pin. ntc faults and bad battery faults are indicated with serrated pulses; this is described in more detail under the heading fault condi- tions in the applications information section. when the battery is being charged, the ? c ? h ? r ? g pin is pulled low by an internal n-channel mosfet. when the charge cycle enters voltage mode charging and the charge current is reduced below i cc-chg /10, the ? c ? h ? r ? g indicates that the charge cycle is nearly complete by switching to a hi-z state. also when the battery voltage exceeds the out voltage and the input supply is removed, or the ltc4067 is put into suspend or shutdown modes, the ? c ? h ? r ? g pin is forced into a high impedance state. if a bad battery is detected, or if an ntc temperature fault is detected, charging is halted and the ? c ? h ? r ? g pin switches to a series of serrated open-drain pull down pulses. these serrated current pulses are designed to cause an led connected from the ? c ? h ? r ? g pin to a positive supply voltage to visibly ? ash, indicating to the user that there is a problem, as well as allowing a microcontroller to detect a fault condition within 300s. overvoltage protection the ovi input is provided to sense potentially hazardous voltages at the input in case an unregulated wall adapter is applied. if an overvoltage condition is detected the ovp pin is driven high to turn off an external pmos transistor inserted in series with the in pin to disconnect the high voltage from the ltc4067. table 2 lists recommended p-channel mosfets to use with the ltc4067. table 2. recommended ovp transistors part number description irlml6402 p-channel 16v fdr8508p dual p-channel 16v if the ovp pin is high, the power path from in to out is disabled.
ltc4067 15 4067f applicatio s i for atio wu u u battery charger stability considerations the ltc4067 battery charger contains two control loops: constant voltage and constant current. the constant-volt- age loop is stable without any compensation when a battery is connected with low impedance leads. excessive battery lead length, however, may add enough series inductance to require a bypass capacitor of at least 1f from bat to ground. furthermore, a 4.7f capacitor with a 0.2 to 1 series resistor is required from bat to ground to keep the ripple voltage low when the battery is disconnected. in constant-current mode the prog pin is in the feedback loop, not the bat pin. because of the additional pole cre- ated by prog pin capacitance, additional capacitance on this pin must be kept to a minimum. with no additional capacitance on the prog pin, the charger is stable with program resistor values as high as 6k. however additional capacitance on this node reduces the maximum allowed program resistor. the pole frequency at the prog pin should be kept above 500khz. therefore, if the prog pin is loaded with a capacitance, c prog , the following equa- tion should be used to calculate the maximum resistance value for r prog : r prog 1/(2 ? 5 ? 10 5 c prog ) average, rather than instantaneous, battery current may be of interest to the user. for example, if a switching power supply operating in low current mode is connected in parallel with the battery, the average current being pulled out of the bat pin is typically of more interest than the instantaneous current pulses. in such a case, a simple rc ? lter at the prog pin measures the average bat pin current, as shown in the ? gure below. a 20k resistor has been added between the prog pin and the ? lter capacitor to ensure stability. this technique may also be used on the clprog pin. ntc thermistor input pin an ntc input provides the option of charge quali? cation using battery temperature and an external thermistor thermally coupled to the battery. when the thermistor senses an over or under temperature condition, charg- ing is suspended until the temperature returns to a safe operating range. the ? c ? h ? r ? ? g pin ? ashes while this out of temperature condition persists. if the ntc pin is grounded, ntc charge quali? cation is disabled. for more informa- tion on the ? c ? h ? r ? ? g pin during fault conditions see the fault conditions heading. the battery temperature is measured by placing a nega- tive temperature coef? cient (ntc) thermistor in thermal contact with the battery. the thermal regulation feature of the ltc4067, requires a thermistor, r ntc , between the ntc pin and gnd as well as a second resistor, r nom , from the ntc pin to in. the recommended r nom resistor has a value equal to the value of the chosen ntc thermistor at 25c. (for a vishay nths0603n02n1002 thermistor this value is 10k.) the ltc4067 charger goes into hold mode when the resistance, r hot , of the ntc thermistor drops to 0.41 times the value of r nom or approximately 4.1k, which is at 50c. hold mode freezes the timer and stops the charge cycle until the thermistor indicates a return to a valid temperature range. as the temperature drops, the resistance of the ntc thermistor rises. the ltc4067 is also designed to go into hold mode when the value of the figure 2. isolating capacitive load on prog pin and filtering. ltc4067 20k average battery current 4067 f02 prog r prog c filter
ltc4067 16 4067f applicatio s i for atio wu u u ntc thermistor, r cold , increases to 2.82 times the value or r nom . (for a vishay nths0603n02n1002 thermistor this value is 28.2k which corresponds to a temperature of approximately 0c). the hot and cold comparators each have approximately 3c of hysteresis to prevent oscillation about the trip points. fault conditions the ? c ? h ? r ? ? g pin is used to signal two distinct fault condi- tions: ntc faults and bad battery faults. both of these conditions are signaled at the ? c ? h ? r ? ? g pin with a series of serrated open-drain pull-down pulses that are intended to produce a visible blinking at an led tied to this pin as well as to produce a pulse train that is detectable to a microprocessor input connected to this pin. the serrated pulses are described with the aid of figure 3, assuming that the ? c ? h ? r ? ? g pin is connected to a positive rail with a resistive pull-up. when an ntc fault condition is detected during a normal charge cycle, the ? c ? h ? r ? ? g pin immediately goes from a strong open-drain pull down to a high-im- pedance state that pulses on for 1.4s and then off at a 35khz rate. this signal is further modulated by a 1.5hz blink frequency that reverses from pulsing high-to-low to pulsing low-to-high. table 3 illustrates the four possible states of the ? c ? h ? r ? g pin when the battery charger is active. table 3. ? c ? h ? r ? g output pin status frequency modulation (blink) frequency duty cycle charging 0hz 0hz (lo-z) 100% i bat < i cc-chg /10 0hz 0hz (hi-z) 0% ntc fault 35khz 1.5hz at 50% 4.7% to 95.3% bad battery 35khz 6.1hz at 50% 9.4% to 90.6% a bad battery fault has a 2.8s pulse at the same rate that is modulated by a 6hz blink frequency. as the ? c ? h ? r ? ? g pin immediately changes state upon entering a failure mode, a microprocessor observing this pin detects the fault condi- tion within 29s of the failure occurring, by measuring the pulse width. furthermore the blink frequency is visually detected by hooking this signal up to an led. when connecting a microprocessor with a positive logic suppy that is different than the led anode, a diode must be inserted in series with the microcontroller input so as to aviod the condition where the led may inadvertantly power up the microcontroller. a circuit that allows visual fault and/or charge status as well as providing a safe microcontroller interface is shown in figure 4. normal charging pw = 1.3 s or 2.7 s pw = 27.7 s (ntc fault) 26.3 s (bad bat) t s = 667ms/2 (ntc fault) 167ms/2 (bad bat) v (chrg) 4067 f03 t s fault condition figure 3 figure 4. ? c ? h ? r ? g pin connection to drive a microcontroller at the same time as providing a visual fault and/or charge status ltc4067 out vlogic to micro 4067 f04 chrg
ltc4067 17 4067f typical applicatio s u li-ion charger from 5v wall adapter with overvoltage protection figure 5 illustrates an application where the ltc4067 is used to charge a single-cell li-ion battery from a wall adapter with built-in overvoltage protection. overvoltage protection is achieved with the ovi and ovp pins of the ltc4067 along with an external pfet in se- ries with the in pin. this pfet disconnects the ltc4067 from potentially damaging overvoltage conditions that are caused by attaching the wrong wall adapter. when the ovi input senses a voltage greater than v ovth , the ovp output is pulled up to disable the pfet. when ovi is below this threshold, the ovp output is pulled low, turning on this pfet. in the event that large in-rush currents are expected, it is recommended that a decoupling capacitor be placed from ovi to gnd. the body diode of this pfet must be connected so that it is reverse biased when an overvoltage condition exists. a 10nf capacitor is recommended to dynamically pull-up on the gate of q1 if a fast edge occurs at the wall input during a hot-plug. in the event that this capacitor is pre-charged below the ovi rising threshold when a high voltage spike occurs, the ovp output cannot guarantee turning off q1 before the in pin voltage exceeds the absolute maximum voltage for this pin. this may occur in the event that the wall input suddenly steps from 5.5v to a higher voltage. in this case, a zener diode is also recommended to keep the in pin voltage to a safe level. in the example of figure 5, the input current limit from the wall adapter is programmed to 1a with a 1k resistor from clprog to gnd (assuming i lim0 and i lim1 are held high). and the charge current is programmed to 500ma via the 2k resistor from the prog pin to gnd. an optional second external pfet connected between out and bat serves as a high-performance ideal diode; to connect the load to the battery with an extremely low impedance. this ideal diode is controlled by the gate output pin whenever the wall adapter is not present or the load demands more current than is available from the wall adapter input (connect the source of the pfet to out and the drain to bat). instantaneous monitoring of both input current and charge current is achieved by measuring the voltages at the clprog and prog pins respectively. low-power shutdown is engaged by any of the following. disabling an external nfet tied in series with the prog pin resistor, by ? oating the prog pin with a single-pole switch, by tying r prog to an open-drain output, by pulling figure 5. li-ion charger/controller with overvoltage protection ltc4067 out gate 1-cell li-ion 10 f in input current monitor load enable q3 q2 r prog 2k r clprog 1k in chrg bat ntc i lim0 prog i lim1 clprog gnd wall adapter 1 f 10 f d1 optional q1 q1, q2: ifr7404 charge current monitor 4067 f05 ovp ovi optional source drain 10nf
ltc4067 18 4067f typical applicatio s u the prog pin to the most positive supply rail (in, bat or out)(not shown). in low-power shutdown total current consumption of the ltc4067 is less than 20a. figure 6 illustrates an application for charging single-cell li-ion batteries directly from a usb bus conforming to the usb requirements for low-power (lpwr), high-power (hpwr), or self-powered functions. here, the ltc4067 ensures that the load at out sees the usb potential when the usb port is applied. when the usb port is removed the load is powered from the battery through an internal 200m ideal diode. optionally an external pfet driven by the gate pin is used to improve performance by reducing the series resistance. the 2k resistor at the clprog pin ensures that the maxi- mum current drawn from the usb input port is kept below the maximum allowed depending on the permitted power allocation. 500ma for hpwr usb function or 100ma for lpwr usb function. the ltc4067 is con? gured to comply with the usb suspend speci? cation by driving the i lim0 pin low and the i lim1 pin high, whereby the load at out is powered from the battery and the only current drawn from the usb port is due to the two series ntc pin resistors. the 2k resistor at the prog pin selects 500ma for the charge current to automatically charge a single-cell li-ion battery following a constant-current/constant-voltage (cc/cv) algorithm with a built-in timer that halts charg- ing after the battery achieves the maximum ? oat voltage of 4.2v. note that actual charge current depends on the load current, as the charger shares the usb current with the load. during a charge cycle the ? c ? h ? r ? ? g pin signals that the battery is charging in constant-current mode by pull- ing to gnd through an open-drain drive output capable of driving an led for visual indication of charge status. when the charge current drops to less than 10% of the programmed charge current, and the battery is above the recharge threshold (4.1v), the ? c ? h ? r ? ? g pin assumes a high impedance state (but top-off charge current continues to ? ow until the internal charge timer elapses). bad battery and battery out-of-temperature conditions are also ? agged with the ? c ? h ? r ? ? g pin as described in the fault conditions section. if the load demands more current than allowed by the usb current limit, the charge current is automatically scaled back. up to the point where an ideal diode function from bat to out turns on once the out voltage drops below the bat voltage. when the ideal diode is engaged, the battery charge cycle is paused and the load at out draws current both from the usb port as well as from the battery. at any time, the user may monitor both instantaneous charge current and instantaneous usb current by observ- ing the prog pin and clprog pin voltages respectively. when probing these nodes with a capacitive sensor, a series resistance is recommended to ensure that bulk capacitance from these two nodes to gnd does not exceed 50pf. figure 6. usb battery charger ltc4067 out 1-cell li-ion to load optional 10 f 4067 f06 r prog 2k r clprog 2k in chrg bat gate ntc i lim0 prog i lim1 clprog gnd usb input 10 f in source drain
ltc4067 19 4067f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio u de/ue package 12-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1695 rev c) 4.00 0.10 (2 sides) 3.00 0.10 (2 sides) note: 1. drawing proposed to be a variation of version (wged) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 1.70 0.05 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 0.25 0.05 3.30 0.05 (2 sides) 1 6 12 7 0.50 bsc pin 1 notch r = 0.20 or 0.35 45 chamfer pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (ue12/de12) dfn 0905 rev c 0.25 0.05 3.30 0.05 (2 sides) recommended solder pad pitch and dimensions 1.70 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.70 0.05 3.60 0.05 package outline
ltc4067 20 4067f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0407 ? printed in usa typical applicatio u related parts part number description comments battery chargers ltc4054 standalone linear li-ion battery charger with integrated pass transistor in thinsot? thermal regulation prevents overheating, c/10 termination, c/10 indicator, up to 800ma charge current ltc4059 900ma linear lithium-ion battery charger 2mm 2mm dfn package, thermal regulation, charge current monitor output ltc4065/ltc4065a standalone li-ion battery chargers in 2 2 dfn 4.2v, 0.6% float voltage, up to 750ma charge current, 2mm 2mm dfn, a version has acpr function. ltc4411/ltc4412 low loss powerpath controller in thinsot automatic switching between dc sources, load sharing, replaces oring diode ltc4412hv high voltage power path controllers in thinsot v in = 3v to 36v, more ef? cient than diode oring, automatic switching between dc sources, simpli? ed load sharing, thinsot package. power management ltc3455 dual dc/dc converter with usb power manager and li-ion battery charger seamless transition between power sources: usb, wall adapter and battery; 95% ef? cient dc/dc conversion ltc4055 usb power controller and battery charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode, 4mm 4mm qfn16 package ltc4066 usb power controller and li-ion battery charger with low-loss ideal diode charges single cell li-ion batteries directly from a usb port, thermal regulation, 50m ideal diode, 4mm 4mm qfn24 package ltc4085 usb power manager with ideal diode controller and li-ion charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, 4mm 3mm dfn14 package ltc4089/ ltc4089-5 usb power manager with ideal diode controller and high ef? ciency li-ion battery charger high ef? ciency 1.2a charger from 6v to 36v (40v max) input charges single-cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, bat-track adaptive output control (ltc4089), fixed 5v output (ltc4089-5), 4mm 3mm dfn-14 package thinsot is a trademark of linear technology corporation. li-ion charger/controller with overvoltage protection ltc4067 out gate 1-cell li-ion 10 f in input current monitor load enable q3 r prog 2k r clprog 1k in chrg bat ntc i lim0 prog i lim1 clprog gnd wall adapter 1 f 10 f d1 optional q1 q1, q2: ifr7404 charge current monitor 4067 ta02 ovp ovi optional source drain 10nf q2

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